ATX-H110

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1. Models and Attentions

1.1 Models

This manual is applied to following models:

1.2 Attentions

1) Notes under a table or figure indicate the difference of models, or alternative definition of specific pin of the header (jumper/connector).

2) How to identify the first pin of a header or jumper

Usually, there is a thick line or a triangle near the header’s or jumper’s pin 1

Square pad, which you can find on the back of the motherboard, is usually used for pin 1.

2. Specification

[1]: 6th Generation CPU support DDR4 2133.
[2]: MINI-PCIE1 slot supports 3G and WIFI by default,MSATA1 slot supports mSATA by default. mSATA and SATA1 share the same signal, they can’t be accessed simultaneously.
[3]: COM3-4 is RS232 by default, RS485 is selectable by “COM3-4 Select Jumpers”(JM_COM3-4, Location 6).

4. Jumpers / Headers and Connectors

Jumpers / Headers and Connectors
1	GPIO Pin Header	P₇	20	ATX2 Power Supply Connector
2	Front USB1-2 Pin Headers	P₇	21	ATX1 Power Supply Connector
3	Parallel Pin Header	P₈	22	CPU Socket Slot
4	COM2-6 Pin Headers	P₈	23	Mini PCI-E Slot
5	COM2-6 Select Jumpers	P₉	24	PCIE 16X Slot
6	COM3-4 Select Jumpers	P₉	25	PCIE 1X Slot
7	AT or ATX Select Jumper	P₉	26	PCIE 4X Slot
8	CMOS Clear Select Jumper	P₁₀	27	SIM Card Slot
9	SMB Pin Header	P₁₀	28	PCI Slots
10	CPU Fan2-3 Pin Headers	P₁₀	29	PS/2 Connector (keyboard or mouse)
11	Front Panel Pin Header1	P₁₀	30	DVI Connector
12	Buzzer Mute Select Jumper	P₁₀	31	COM Connector
13	Front Panel Pin Header2		32	LAN Connectors
14	CPU Fan1 Pin Header	P₁₀	33	USB2.0 Connectors
15	COM1 Select Jumper	P11	34	VGA Connector
16	Front Audio Pin Header	P11	35	HDMI Connector
17	mSATA Slot		36	USB3.0 Connectors
18	SATA3.0 Connectors		37	Audio Connector
19	DIMM Slots

5. Definition of Jumpers / Headers and Connectors

[1] GPIO Pin Header (6*2 Pin 2.00mm)

Location	Header	Pin	Definition	Pin	Definition
	J_GPIO1	1	PCH_GPP_E4 (0xFDAE05A0 Bit1,H) ^[1]	2	PCH_GPP_E5 (0xFDAE05A8 Bit1,H) ^[1]
		3	PCH_GPP_E6 (0xFDAE05B0 Bit1,H)^[1]	4	PCH_GPP_F5 (0xFDAE0610 Bit1,H) ^[1]
		5	GND	6	PCH_GPP_F6 (0xFDAE0618 Bit0,H) ^[1]
		7	PCH_GPP_F7 (0xFDAE0620 Bit0,H) ^[1]	8	PCH_GPP_F8 (0xFDAE0628 Bit0,H) ^[1]
		9	PCH_GPP_F9 (0xFDAE0630 Bit0,H) ^[1]	10	+ 5V ^[2]
				12	N/C

Notes:

[1]: “H” or “L” means the default voltage is High or Low level.

[2]: Power on this Pin and GPIO output is 5V signaling by default, 3.3V is available if specified (resistor selectable).

[2] Front USB1-2 Pin Headers (5*2 Pin 2.54mm)

Location	Header	Pin	Definition	Pin	Definition
	F_USB2_1	1	+ 5V	2	+ 5V
		3	USB8-	4	USB9-
		5	USB8+	6	USB9+
		7	GND	8	GND
				10	N/C
	F_USB2_2	1	+ 5V	2	+ 5V
		3	USB5- ^[1]	4	USB10-
		5	USB5+ ^[1]	6	USB10+
		7	GND	8	GND
				10	N/C

Note:

[1]: This Pin and Mini PCI-E1 share the same USB signal and can’t be accessed simultaneously. If Mini PCI-E1 doesn’t support 3G device, this USB signal can be supplied.